Nowadays, a semiconductor integrated circuit element (semiconductor chip) to be used as, for example, a microprocessor for a computer is increasingly getting high-speed and sophisticated. Concomitantly, there is a trend that the number of terminals increases and pitch between terminals narrows. Typically, multiple connecting terminals are arranged on a bottom surface of the semiconductor chip. Respective connecting terminals of the semiconductor chip connect to a plurality of connecting terminal portions formed on a wiring board in a flip-chip structure.
For more details, the connecting terminal portion of the wiring board includes a conductor layer mainly constituted of copper, and connects to the connecting terminal at the semiconductor chip side via, for example, a solder bump. In this wiring board, in the case where the distance between adjacent connecting terminal portions narrows, there is concern that the solder flows out to the adjacent terminal portion and wiring during connection of the semiconductor chip, and then a problem such as a short circuit between terminals occurs. In order to avoid this problem, a wiring board that has a resist pattern for separating the wiring and the terminal portion has been proposed (for example, see Patent Document 1). The wiring board in Patent Document 1 includes a first solder resist layer and a second solder resist layer. The first solder resist layer includes a first opening portion in which a part of solder bump is buried. The second solder resist layer includes a second opening portion that is disposed on this solder resist layer and penetrated by the solder bump. In the wiring board, the second solder resist layer is formed in a grid pattern to surround the respective solder bumps on the staggered connecting terminal portions. Disposing the second solder resist layer prevents the solder from flowing out during connection of the semiconductor chip. In other words, the second solder resist layer also functions as a solder flow-out preventing dam.